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| # p p t u j o h 7 p m u b h f 3 f h v m b u p s t 4 f s j f t 347 3 ( f o f s b m % f t d s j q u j p o ' f b u v s f t " q q m j d b u j p o t 5 z q j d b m " q q m j d b u j p o $ j s d v j u the xc62e series are a group of positive output voltage regulators that can supply up to 1a of output current using an external transistor. low power and high accuracy are achieved through cmos process and laser trimming technologies. the series consists of a high precision voltage reference, an error correction circuit and a short-circuit protected output driver. in stand-by mode, supply current can be dramatically cut. since the input-output voltage differential is small, loss control efficiency is good. the xc62e is particularly suited for use with battery operated portable products, and products where supply current regulation is required. the series comes in an ultra small sot-25 package. in connection with the ce function, apart from the negative logic xc62ep series, a positive logic xc62er series (custom) is also available. ultra small input-output voltage differential : 100ma of output current is available with a differential of 0.1v. (performance depends on the external transistor characteristics.) maximum output current : 1000ma output voltage range : 2v ~ 6v in 0.1v increments highly accurate : set-up voltage ?% low power consumption : typ.50 a (v out =5.0v) : typ.0.2 a (stand-by) output voltage temperature characteristics : typ.?00ppm/? input stability : typ.0.1%/v ultra small packages : sot-25 mini-mold portable cameras and video recorders battery powered equipment palmtops reference voltage sources cmos low power consumption small input-output voltage differential : 0.1v @ 100ma maximum output current : 1000ma output voltage range : 2v~6v output voltage accuracy : 2% 1 7 * / 7 0 6 5 7 t t $ & 3 # & 3 # & 9 5 3 ! 7 * / 1 / 1 5 s $ * / 5 b o u b m v n $ - 5 b o u b m v n * o q v u 0 v u q v u % j g g 7 e j g 7 0 v u q v u $ v s s f o u * 0 6 5 n " 9 $ & 1 7 $ - 1 ' u b o u b m v n 5 p q s1 ? ? ? 5 z q j d b m 1 f s g p s n b o d f $ i b s b d u f s j t u j d 4 @ 9 $ & 1 . ??
9 $ & 4 f s j f t 348 3 1 j o $ p o g j h v s b u j p o 1 j o " t t j h o n f o u 1 s p e v d u $ m b t t j g j d b u j p o ordering information ' v o d u j p o pin number 1 2 3 4 5 function ground supply voltage input regulated voltage output base current control chip enable pin name v ss v in v out ext ce/ce series ce output voltage xc62er h on l off xc62ep h off l on h=high level l=low level 4 0 5 5 0 1 7 * & 8 $ & 7 4 4 & 9 5 7 * / 7 0 6 5 $ & designator a e f b c d description designator description ce pin logic: r=positive p=negative output voltage 30 = 3.0v 50 = 5.0v temperature coefficients: 0= 100ppm (typical) output voltage accuracy: 1= 1.0%(semi-custom) 2= 2.0% package type m=sot-25 device orientation r=embossed tape (standard feed) l=embossed tape (reverse feed) 9 $ & 9 9 9 9 9 9 9 a b a c a d a e a f a g 4 @ 9 $ & 1 . ?? 9 $ & 4 f s j f t 349 3 1 b d l b h j o h * o g p s n b u j p o sot-25 . b s l j o h w 3 f q s f t f o u t u i f j o u f h f s p g u i f 0 v u q v u 7 p m u b h f q / p u 6 t f e r type positive voltage logic symbol 2 _ voltage(v) p type negative voltage logic symbol voltage(v) 2. e 2 6 _ 6. e 6 5 _ 5. e 5 4 _ 4. e 4 3 _ 3. e 2. e 6. e 5. e 4. e 3. e 3 e 3 f q s f t f o u t u i f e f d j n b m o v n c f s p g u i f 0 v u q v u 7 p m u b h f r type positive voltage logic symbol 0 _ voltage(v) p type negative voltage logic symbol voltage(v) w .0 0 w .4 w .3 w .2 1 _ w .1 1 2 _ 2 6 _ 6 5 _ 5 4 _ 4 3 _ 3 w .5 9 _ w .9 9 8 _ w .8 8 7 _ w .7 7 w .6 w .0 w .4 w .3 w .2 w .1 w .5 w .9 w .8 w .7 w .6 r # b t f e p o j o u f s o b m t u b o e b s e t 4 0 5 5 0 1 7 * & 8 ? ? ? ? n j o ? 4 @ 9 $ & 1 . ?? 9 $ & 4 f s j f t 350 3 " c t p m v u f . b y j n v n 3 b u j o h t # m p d l % j b h s b n 7 0 6 5 7 % % $ & & 9 5 7 4 4 $ v s s f o u - j n j u 7 p m u b h f 3 f g f s f o d f parameter v in input voltage ce/ce input voltage ext output voltage ext output current continuous total power dissipation operating ambient temperature storage temperature symbol v in v ce v ext i ext pd topr tstg ratings 12 v ss -0.3~v in +0.3 12 50 150 ma mw -30~+80 -40~+125 units v v v out output voltage v out v ss -0.3~v in +0.3 v v c c ta=25 c 4 @ 9 $ & 1 . ?? 9 $ & 4 f s j f t 351 3 & m f d u s j d b m $ i b s b d u f s j t u j d t xc62ep3002 v out (t)=3.0v (note1) 1. v out (t)=specified output voltage . 2. v out (e)=effective output voltage (i.e. the output voltage when "v out (t)+1.0v" is provided at the v in pin while maintaining a certain i out value). 3. vdif= {v in 1 (note5) -v out 1 (note4) } 4. v out 1= a voltage equal to 98% of the output voltage whenever an amply stabilised i out {v out (t)+1.0v} is input. 5. v in 1= the input voltage when v out 1 appears as input voltage is gradually decreased. 6. the characteristics for those parameters marked with an asterisk* are liable to vary depending on which transistor is used. please use a transistor with a low saturation voltage level and h fe equal to 100 or more. 7. the maximum output current value is not a value representing continuous output due to the limitations of the 2as1213 transistor's power dissipation. note: parameter conditions min typ max units symbol output voltage i out =50ma v in =4.0v 2.940 1000 3.000 3.060 v load stability* v in =4.0v ma i out max.maximum output current* input-outputvoltage differential (note3) v in =4.0v 1ma i out 100ma 0.2 60-60 mv ? v out supply current1 i out =100ma i out =50ma 4.0v v in 8.0v i out =10ma 30 c topr 80 c 100 mv vdif supply current2 input stability* ext output voltage ext leak current ce "high" level current ce "low" level current input voltage output voltage temperature characteristics* v in =4.0v, v ce =v ss v in =8.0v,v ce =v in 50 0.1 100 0.05 0.6 0.3 8 0.5 0.1 0 a80 a %/v v ppm/ c v8 a a a i ss 1 i ss 2 v in v ext i leak 1.5 ce "high" level voltage ce "low" level voltage 0.25 v v v ceh v cel i ceh i cel v ce =v in v ce =v ss ? v out ? v in v out ? v out ? t opr v out ta=25 c v out (e) (note2) the characteristics for the xc62er series are the same as above except for the ce operating logic which is the opposite. 4 @ 9 $ & 1 . ?? 9 $ & 4 f s j f t 352 3 xc62ep4002 v out (t)=4.0v (note1) parameter conditions min typ max units symbol output voltage i out =50ma v in =5.0v 3.920 1000 4.000 4.080 v load stability* v in =5.0v ma i out max.maximum output current* input-output voltage differential (note3) v in =5.0v 1ma i out 100ma 0.2 60-60 mv ? v out supply current1 i out =100ma i out =50ma 5.0v v in 8.0v i out =10ma 30 c topr 80 c 100 mv vdif supply current2 input stability* ext output voltage ext leak current ce "high" level current ce "low" level current input voltage output voltage temperature characteristics* v in =5.0v, v ce =v ss v in =8.0v,v ce =v in 50 0.1 100 0.05 0.6 0.3 8 0.5 0.1 0 a80 a %/v v ppm/ c v8 a a a i ss 1 i ss 2 v in v ext i leak 1.5 ce "high" level voltage ce "low" level voltage 0.25 v v v ceh v cel i ceh i cel v ce =v in v ce =v ss ? v out ? v in v out ? v out ? t opr v out ta=25 c v out (e) (note2) xc62ep5002 v out (t)=5.0v (note1) 1. v out (t)=specified output voltage . 2. v out (e)=effective output voltage (i.e. the output voltage when "v out (t)+1.0v" is provided at the v in pin while maintaining a certain i out value). 3. vdif= {v in 1 (note5) -v out 1 (note4) } 4. v out 1= a voltage equal to 98% of the output voltage whenever an amply stabilised i out {v out (t)+1.0v} is input. 5. v in 1= the input voltage when v out 1 appears as input voltage is gradually decreased. 6. the characteristics for those parameters marked with an asterisk* are liable to vary depending on which transistor is used. please use a transistor with a low saturation voltage level and h fe equal to 100 or more. 7. the maximum output current value is not a value representing continuous output due to the limitations of the 2as1213 transistor's power dissipation. note: parameter conditions min typ max units symbol output voltage i out =50ma v in =6.0v 4.900 1000 5.000 5.100 v load stability* v in =6.0v ma i out max.maximum output current* input-output voltage differential (note3) v in =6.0v 1ma i out 100ma 0.2 60-60 mv ? v out supply current1 i out =100ma i out =50ma 6.0v v in 8.0v i out =10ma 30 c topr 80 c 100 mv vdif supply current2 input stability* ext output voltage ext leak current ce "high" level current ce "low" level current input voltage output voltage temperature characteristics* v in =6.0v, v ce =v ss v in =8.0v,v ce =v in 50 0.1 100 0.05 0.6 0.3 8 0.5 0.1 0 a80 a %/v v ppm/ c v8 a a a i ss 1 i ss 2 v in v ext i leak 1.5 ce "high" level voltage ce "low" level voltage 0.25 v v v ceh v cel i ceh i cel v ce =v in v ce =v ss ? v out ? v in v out ? v out ? t opr v out ta=25 c v out (e) (note2) the characteristics for the xc62er series are the same as above except for the ce operating logic which is the opposite. 4 @ 9 $ & 1 . ?? 9 $ & 4 f s j f t 353 3 5 z q j d b m " q q m j d b u j p o $ j s d v j u standard circuit 0 q f s b u j p o b m & y q m b o b u j p o functional description output voltage (v out ) can be fixed by revising the external transistor's base current. this can be done by comparing the detected voltage level and the set voltage power supply level. with the xc62ep (ce negative voltage), if a voltage above the ce pin's "h" level is applied, the ic will enter stand-by mode where the base and differential amplifier's currents are regulated. special note 1. protection circuit the built-in protect circuit is to protect the ic only. therefore to prevent output shorts and overshoot current through the transistor, use of a resistor r b or an overshoot current protection circuit is recommended. care should also be taken with the transistor's power dissipation. suggestions for external components 1. pnp transistor the selection of a transistor should take into account output current, input voltage and power dissipation for each specific application. it is recommended that a transistor that has a low output saturated voltage (v ce ) and high h fe characteristics be used. 2. r b resistor although the ic unit is protected by a base current remitter circuit, it is recommended that a resistor (r b ) be connected between the transistor's base and the ic's ext pin to protect the transistor. required output current can be calculated using the following equation although characteristic variations and conditions of use should be carefully checked before use. the following equation also indicates the conditions needed to obtain i out (max.) at v in (min.). however, the larger the input current, the larger the output current (i out ) that can be obtained. v in (min)-1.2(v) 0.7(v) i out (max) r b r be h fe 3. r be resistor, c l capacitor to prevent oscillation due to output load variation, use of a phase compensation capacitor c l is recommended. please use a tantalum capacitor of at least 10 f. please also use an r be resistor of less than 47k ? . an r be resistor of between 20k ? and 47k ? is recommended for less power consumption. 4. input impedance in order to control oscillation brought about as a result of impedance at the power supply line, connect a capacitor of 10 f or more (tantalum) between the external transistor's emitter and the ground pin. 1 f s j q i f s b m t 1 / 1 5 s 4 " 3 # & l ? ? l ? 3 # 1 m f b t f s f g f s u p / p u f p o u i f g p m m p x j o h q b h f $ * / ' 5 b o u b m v n $ - ' 5 b o u b m v n ' n j o j n v n 7 * / 7 0 6 5 7 t t $ & 3 # & 3 # & 9 5 3 ! 7 * / 1 / 1 5 s $ * / 5 b o u b m v n $ - 5 b o u b m v n % j s f d u j p o t g p s v t f 4 @ 9 $ & 1 . ?? 9 $ & 4 f s j f t 354 3 5 z q j d b m 1 f s g p s n b o d f $ i b s b d u f s j t u j d t 0 v u q v u 7 p m u b h f 7 0 6 5 7 0 v u q v u $ v s s f o u * 0 6 5 n " 9 $ & 1 7 yyy 5 p q s1 ? 7 * / 1 7 $ - 1 ' u b o u b m v n 0 v u q v u 7 p m u b h f 7 0 6 5 7 0 v u q v u $ v s s f o u * 0 6 5 n " 9 $ & 1 7 yyy 5 p q s1 ? 7 * / 1 7 $ - 1 ' u b o u b m v n 0 v u q v u 7 p m u b h f 7 0 6 5 7 0 v u q v u $ v s s f o u * 0 6 5 n " 9 $ & 1 7yy 5 p q s1 ? 7 * / 1 7 $ - 1 ' u b o u b m v n 0 v u q v u 7 p m u b h f 7 0 6 5 7 * o q v u 7 p m u b h f 7 * / 7 9 $ & 1 7 yy $ - 1 ' u b o u b m v n 5 p q s1 ? * 0 6 5 1 n " n " n " 0 v u q v u 7 p m u b h f 7 0 6 5 7 * o q v u 7 p m u b h f 7 * / 7 9 $ & 1 7 yy $ - 1 ' u b o u b m v n 5 p q s1 ? * 0 6 5 1 n " n " n " 0 v u q v u 7 p m u b h f 7 0 6 5 7 * o q v u 7 p m u b h f 7 * / 7 9 $ & 1 7 yy $ - 1 ' u b o u b m v n 5 p q s1 ? * 0 6 5 1 n " n " n " 0 v u q v u 7 p m u b h f 7 0 6 5 7 * o q v u 7 p m u b h f 7 * / 7 9 $ & 1 7 yy y $ - 1 ' u b o u b m v n 5 p q s1 ? * 0 6 5 1 n " n "| n " 0 v u q v u 7 p m u b h f 7 0 6 5 7 * o q v u 7 p m u b h f 7 * / 7 9 $ & 1 7yy $ - 1 ' u b o u b m v n 5 p q s1 ? * 0 6 5 1 n " n " n " 0 v u q v u 7 p m u b h f 7 0 6 5 7 * o q v u 7 p m u b h f 7 * / 7 9 $ & 1 7yy $ - 1 ' u b o u b m v n 5 p q s1 ? * 0 6 5 1 n "| n " n " (1) output voltage vs. output current (2) output voltage vs. input voltage 4 @ 9 $ & 1 . ?? 9 $ & 4 f s j f t 355 3 * o q v u 0 v u q v u % j g g 7 e j g 7 0 v u q v u $ v s s f o u * 0 6 5 n " 9 $ & 1 7 $ - 1 ' u b o u b m v n 5 p q s1 ? ? ? * o q v u 0 v u q v u % j g g 7 e j g 7 0 v u q v u $ v s s f o u * 0 6 5 n " 9 $ & 1 7 $ - 1 ' u b o u b m v n 5 p q s1 ? ? ? * o q v u 0 v u q v u % j g g 7 e j g 7 0 v u q v u $ v s s f o u * 0 6 5 n " 9 $ & 1 7 $ - 1 ' u b o u b m v n 5 p q s1 ? ? ? 4 v q q m z $ v s s f o u * t t " * o q v u 7 p m u b h f 7 * / 7 9 $ & 1 7 5 p q s1 ?| ? ? 4 v q q m z $ v s s f o u * t t " * o q v u 7 p m u b h f 7 * / 7 9 $ & 1 7 5 p q s1 ?| ? ? 4 v q q m z $ v s s f o u * t t " * o q v u 7 p m u b h f 7 * / 7 9 $ & 1 7 5 p q s1 ?| ? ? 0 v u q v u 7 p m u b h f 7 0 6 5 7 " n c j f o u 5 f n q 5 p q s ? 9 $ & 1 7 7 * / 1 7 * 0 6 5 1 n " $ - 1 ' u b o u b m v n 0 v u q v u 7 p m u b h f 7 0 6 5 7 " n c j f o u 5 f n q 5 p q s ? 9 $ & 1 7 7 * / 1 7 * 0 6 5 1 n " $ - 1 ' u b o u b m v n 0 v u q v u 7 p m u b h f 7 0 6 5 7 " n c j f o u 5 f n q 5 p q s ? 9 $ & 1 7 7 * / 1 7 * 0 6 5 1 n " $ - 1 ' u b o u b m v n 4 v q q m z $ v s s f o u * t t " " n c j f o u 5 f n q 5 p q s ? 9 $ & 1 7 7 * / 1 7 4 v q q m z $ v s s f o u * t t " " n c j f o u 5 f n q 5 p q s ? 9 $ & 1 7 7 * / 1 7 4 v q q m z $ v s s f o u * t t " " n c j f o u 5 f n q 5 p q s ? 9 $ & 1 7 7 * / 1 7 (3) input/output voltage differential vs. output current (4) supply current vs. input voltage (5) output voltage vs. ambient temperature (6) supply current vs. ambient temperature 4 @ 9 $ & 1 . ?? 9 $ & 4 f s j f t 356 3 (7) input transient response * o q v u 7 p m u b h f 7 * / 7 5 j n f n t f d e j w 9 $ & 1 7 yyy * 0 6 5 1 n " $ - 1 ' u b o u b m v n 0 v u q v u 7 p m u b h f 7 0 6 5 7 * o q v u 7 p m u b h f 0 v u q v u 7 p m u b h f * o q v u 7 p m u b h f 7 * / 7 5 j n f n t f d e j w 9 $ & 1 7 yyy * 0 6 5 1 n " $ - 1 ' u b o u b m v n 0 v u q v u 7 p m u b h f 7 0 6 5 7 0 v u q v u 7 p m u b h f * o q v u 7 p m u b h f * o q v u 7 p m u b h f 7 * / 7 5 j n f n t f d e j w 9 $ & 1 7 yyy * 0 6 5 1 n " $ - 1 ' u b o u b m v n 0 v u q v u 7 p m u b h f 7 0 6 5 7 * o q v u 7 p m u b h f 0 v u q v u 7 p m u b h f * o q v u 7 p m u b h f 7 * / 7 5 j n f n t f d e j w 9 $ & 1 7 yyy * 0 6 5 1 n " $ - 1 ' u b o u b m v n 0 v u q v u 7 p m u b h f 7 0 6 5 7 * o q v u 7 p m u b h f 0 v u q v u 7 p m u b h f * o q v u 7 p m u b h f 7 * / 7 5 j n f n t f d e j w 9 $ & 1 7yyy * 0 6 5 1 n " $ - 1 ' u b o u b m v n 0 v u q v u 7 p m u b h f 7 0 6 5 7 * o q v u 7 p m u b h f 0 v u q v u 7 p m u b h f * o q v u 7 p m u b h f 7 * / 7 5 j n f n t f d e j w 9 $ & 1 7yyy * 0 6 5 1 n " $ - 1 ' u b o u b m v n 0 v u q v u 7 p m u b h f 7 0 6 5 7 * o q v u 7 p m u b h f 0 v u q v u 7 p m u b h f 4 @ 9 $ & 1 . ?? 9 $ & 4 f s j f t 357 3 (8) load transient response 0 v u q v u 7 p m u b h f 7 0 6 5 7 5 j n f n t f d e j w 9 $ & 1 7 yyy 7 * / 1 7 $ - 1 ' u b o u b m v n 0 v u q v u $ v s s f o u * 0 6 5 n " 0 v u q v u 7 p m u b h f 0 v u q v u $ v s s f o u n " n " 0 v u q v u 7 p m u b h f 7 0 6 5 7 5 j n f n t f d e j w 9 $ & 1 7 yyy 7 * / 1 7 $ - 1 ' u b o u b m v n 0 v u q v u $ v s s f o u * 0 6 5 n " n " n " 0 v u q v u 7 p m u b h f 0 v u q v u $ v s s f o u 0 v u q v u 7 p m u b h f 7 0 6 5 7 5 j n f n t f d e j w 9 $ & 1 7yyy 7 * / 1 7 $ - 1 ' u b o u b m v n 0 v u q v u $ v s s f o u * 0 6 5 n " n " n " 0 v u q v u 7 p m u b h f 0 v u q v u $ v s s f o u (9) ripple rejection rate 9 $ & 1 7 yyy 7 * / 1 7 % $ 7 q q " $ * 0 6 5 1 n " $ - 1 ' u b o u b m v n 3 j q q m f 3 f k f d u j p o 3 b u f 3 3 e # 3 j q q m f ' s f r v f o d z g l ) [ 9 $ & 1 7 yyy 7 * / 1 7 % $ 7 q q " $ * 0 6 5 1 n " $ - 1 ' u b o u b m v n 3 j q q m f 3 f k f d u j p o 3 b u f 3 3 e # 3 j q q m f ' s f r v f o d z g l ) [ 3 j q q m f 3 f k f d u j p o 3 b u f 3 3 e # 3 j q q m f ' s f r v f o d z g l ) [ 9 $ & 1 7yyy 7 * / 1 7 % $ 7 q q " $ * 0 6 5 1 n " $ - 1 ' u b o u b m v n 4 @ 9 $ & 1 . ?? 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Price & Availability of XC62ER5002MR
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